SDRPi SDR Platform AD9361 Experimental Board Openwifi Development Board #top

Description: Description SDRPi SDR Development Platform AD9361 Experimental Board Openwifi Development Board Description: This development board is based on the successful experience of selling thousands of sets of board for ZEDBOARD+FMCOMMS3 in our store, and combined with the needs of user feedback. It is a new multi-function software radio development board. The architecture of this board is the most popular software wireless single architecture (for ZYNQ+AD9361). The chip for ZYNQ uses the XC7Z020-CLG400 chip with the same capacity as the board for ZEDBOARD. This SOC contains a processor PS part and a programmable logic PL part. The peripherals connected to the PS part are equipped with Gigabit Ethernet (compatible with 100M and 10M), USB master (can be connected to keyboard, mouse, USB, etc.), serial port (onboard USB to serial port chip can be directly connected to a computer), SD card (Small size TF card can be connected), and FLASH memory (can store startup files and user data). The PL part includes Gigabit Ethernet (which can be used as the second network port of PS through EMIO, or can run the UDP protocol stack we provide), serial port (the onboard USB to serial port chip can be directly connected to a computer), GPSDO (used for external GPS antenna to provide the board with a very high-precision clock, which can reach within 20PPB), I2C_EEPROM is used to store user data, and the RF subsystem (that is, the AD9361 part, connected to the PL pin). In addition, the onboard USB to JTAG can save the XLINX downloader, and connect the USB directly to download and debug online in the development environment such as for VIVADO or SDK. Its power supply part adopts multiple high-efficiency LTM4622 chips and RF-specific LDO chip ADP1755. And its RF part is equipped with a PGA-102+ amplifier, which can put the signal up to 12DB. Of course, this RF amplifier can be bypassed by a selection circuit. Package Included: - 1 x Board 1: Commercial grade chip (for ZYNQ) XC7Z020 CLG400 or automotive grade XA7Z020 CLG400 (no need to modify the program and there is no difference in performance. Automotive grade chip has higher temperature performance). 2 and 3: Two Micron DDR3 memory chips with a capacity of 512M bytes; the actual model is MT41K256M16TW-107:P, which form a 1GB byte memory and hang on the PS for ZYNQ. 4: RF transceiver chip AD9361. 5, 6, and 7: LTM4622 high-efficiency power modules output six groups of voltages. 8 and 9: Two RF-specific LDOs from ADP1755 provide 1.3V power supply to AD9361. 10 and 11: PGA-102+ RF amplifier chip. 12: USB1210 chip implements the USB OTG interface. 13: CP2105 realizes USB to dual serial ports, respectively connected to PS and PL. 14: FT2232HL implements USB to JTAG debugging interface. 15: TF card adapter chip to achieve level conversion between 1.8V PS interface voltage and 3.3V TF card interface voltage. 16: W25Q256 FLASH memory chip can realize FLASH startup. 17: RTL8211EG this Gigabit Ethernet is hung on the PL side to realize UDP/TCP communication through EMIO or an independent protocol stack. We provide an efficient UDP/IP protocol stack written by ourselves. 18: Start mode bar. There are three boot modes: FLASH, TF card, and JTAG. 19: The Ethernet port hanging on the PL side supports 1000M mode. 20: The Ethernet port on the PS side supports 10M/100M/1000M mode self-adaptation. 21: GPS antenna, onboard GPSDO, and an active GPS antenna can be used for calibration. 22: GPSDO status indicator. 23: Chips of several clock circuits such as clock buffers. 24: 40M clock input, used for multi-chip SDPPI to achieve clock cascade synchronization. 25: 40M clock output, used for multi-chip SDRPI to achieve clock cascade synchronization. 26: Reset button, used with 53 to reset the entire system for ZYNQ. This effect is equivalent to plugging in the power supply. 27, 28, and 29: ESD protection chips for protecting chip pins (for ZYNQ) connected to pins 46. 30, 31, 32, and 33: Balun conversion chips for balanced and unbalanced conversion. 35: USB-JTAG USB interface, MicroUSB form; connect to a computer and set 18 as JTAG startup mode, then it can realize online download and debugging. 36: The USB interface of USB OTG is mostly used for USB HOST. It is in the form of a Micro USB interface. It can be connected to conventional USB peripherals such as keyboard, mouse, and U disk by using an adapter cable to convert it into a USB A type port (the corresponding system for LINUX is required). 37: Power supply input and UART serial port, the interface is TYPE-C. The required voltage is 5V and the current is not less than 1A. In addition, this port is connected with a USB to dual UART chip, and the two UART ports are respectively for PS and PL. (attention) 38: Indicator light LD2 is connected to the MI015 of the PS, and the LED is lit when the output 1 is high level. 39: Indicator light LD9 is connected to the K14 of the PL, and the LED is lit when the output 1 is high level. 40: Indicator light LD3, only PL configuration is completed. Regardless of the startup method, when the PL configuration is complete, this light is on. 41: Indicator light LD1 indicates that the board is powered normally. The board has its power-up sequence. This light illuminates when all power sources are stable. This light can simply be thought of as a power indicator. 42: Channel 1 output A RF interface, female connector. 43: Channel 1 input A RF interface, female connector. 44: Channel 2 output A RF interface, female connector. 45: Channel 2 input A RF interface, female connector. 46: External GPIO. These IOs are connected to the PL terminal, and the voltage standard is 3.3V. There are ESD protection chips 28, 28, 29. 47: TX1A RF amplifier enable indication. 48: RA1A receiving indication (just an indicator light. User can customize the control). 49: TX2A RF amplifier enable indication. 50: RA2A receiving indication (just an indicator light. User can customize the control). 51 and 52: Devices such as voltage-controlled temperature-compensated crystal oscillators and DACs realize GPSDO. 53: Reset the chip, the reset button 21 is used to reset the entire system for ZYNQ. The effect is equivalent to unplugging the power supply. 54: TF card slot, the maximum physical capacity of SD card/TF card supported by system for ZYNQ is 32M. 55: GPS module for implementing GPSDO. 56 and 57: EEPROM memory for 12C interface. Payment Terms 1.We accept PayPal only. 2.All major credit cards are accepted through secure payment processor PayPal. 3.Payment must be received within 7 business days of auction closing. 4.We ship to your eBay or Paypal address. Please make sure your eBay and Paypal address is correct before you pay. Shipping Terms - For remote regions, we will charge your extra shipping costs. Usually it cost about 35USD-50USD. We will contact you after your payment. Thanks for your understanding. Return Terms 1. If you receive defective item, please kindly notify us within 14 days. We will guide you the returning instruction for replacement or refund. 2. If you purchased in improper condition, please NOTE that the sipping and handling fee will not be refund, all return shipping fee should paid by the buyer unless item DOA. 3. We reserve the right to refuse any returns for objective reasons. Custom Duties & Taxes 1. Import duties, taxes, and charges are not included in the item price or postage cost. These charges are the buyer's responsibility. 2. Avoiding some unnecessary trouble, please check with your country's customs office to inform us what we should declare its value before shipping. Feedback 1. If you are dissatisfied for any reason, please don't be quick to leave us neutral or negative feedback. We work hard to make sure EVERY CUSTOMER 100% SATISFIED and resolve any problem for you and always leave positive feedback to all our customers. 2. If you are satisfied with the product you received, please kindly leave us a positive feedback and 5 star DSR. If there is any problem of your order, please feel free to contact us firstly, we are responsible and credible seller, will follow it for you asap. On Aug 16, 2022 at 20:59:05 PDT, seller added the following information:

Price: 799.9 USD

Location: Shenzhen

End Time: 2024-09-17T03:53:37.000Z

Shipping Cost: 0 USD